Microchip Technology /ATSAME70Q19B /TWIHS0 /CR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (START)START 0 (STOP)STOP 0 (MSEN)MSEN 0 (MSDIS)MSDIS 0 (SVEN)SVEN 0 (SVDIS)SVDIS 0 (QUICK)QUICK 0 (SWRST)SWRST 0 (HSEN)HSEN 0 (HSDIS)HSDIS 0 (SMBEN)SMBEN 0 (SMBDIS)SMBDIS 0 (PECEN)PECEN 0 (PECDIS)PECDIS 0 (PECRQ)PECRQ 0 (CLEAR)CLEAR 0 (ACMEN)ACMEN 0 (ACMDIS)ACMDIS 0 (THRCLR)THRCLR 0 (LOCKCLR)LOCKCLR 0 (FIFOEN)FIFOEN 0 (FIFODIS)FIFODIS

Description

Control Register

Fields

START

Send a START Condition

STOP

Send a STOP Condition

MSEN

TWIHS Master Mode Enabled

MSDIS

TWIHS Master Mode Disabled

SVEN

TWIHS Slave Mode Enabled

SVDIS

TWIHS Slave Mode Disabled

QUICK

SMBus Quick Command

SWRST

Software Reset

HSEN

TWIHS High-Speed Mode Enabled

HSDIS

TWIHS High-Speed Mode Disabled

SMBEN

SMBus Mode Enabled

SMBDIS

SMBus Mode Disabled

PECEN

Packet Error Checking Enable

PECDIS

Packet Error Checking Disable

PECRQ

PEC Request

CLEAR

Bus CLEAR Command

ACMEN

Alternative Command Mode Enable

ACMDIS

Alternative Command Mode Disable

THRCLR

Transmit Holding Register Clear

LOCKCLR

Lock Clear

FIFOEN

FIFO Enable

FIFODIS

FIFO Disable

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